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Prof. Tae-Woo Lee Develops a Novel and Efficient Fabrication Technology for Cross-Shaped Memristor Array
Writeradmin Date2016.01.28ViewCount760

Prof. Tae-Woo Lee
 
Along with the fast development of modern information technology, charge-based memories, such as DRAM and flash memory, are being aggressively scaled down to meet the current trend of small size devices. A memory device with high density, faster speed, and low power consumption is desired to satisfy Moore’s law in the next few decades. Among the candidates of next-generation memory devices, cross-bar-shaped non-volatile resistive memory (memristor) is one of the most attractive solutions for its non-volatility, faster access speed, ultra-high density and easier fabrication process.
 
Conventional memristors are usually fabricated through conventional optical, imprint, and e-beam lithographic approaches. However, to meet Moore’s law, the assembly of memristors comprised of 1-dimensional (1D) nanowires must be demonstrated to achieve cell dimensions beyond limit of state-of-art lithographic techniques, thus allowing one to fully exploit the scaling potential of high density memory array.
 
Prof. Tae-Woo Lee (Dept. of Materials Science and Engineering) and his research team have developed a rapid printing technology for high density and scalable memristor array composed of cross-bar-shaped metal nanowires. The research team, which consists of Prof. Tae-Woo Lee, research professor Wentao Xu, and doctoral student Yeongjun Lee at POSTECH, published their findings in Advanced Materials.
 
They applied an emerging technique, electrohydrohynamic nanowire printing (e-NW printing), which directly prints highly-aligned nanowire array on a large scale into the fabrication of microminiature memristors, with cross-bar-shaped conductive Cu nanowires jointed with a nanometer-scale CuxO layer. The metal-oxide-metal structure resistive memory device exhibited excellent electrical performance with reproducible resistive switching behavior.
 
This simple and fast fabrication process avoids conventional vacuum techniques to significantly reduce the industrial-production cost and time. This method paved the way to the future down-scaling of electronic circuits, since 1D conductors represent a logical way to extreme scaling of data processing devices in the single-digit nanometer scale.
 
They also succeeded in printing memristor array with various shapes, such as parallel lines with adjustable pitch, grids, and waves which can offer a future stretchable memory for integration into textile to serve as a basic building block for smart fabrics and wearable electronics.
 
“This technology reduces lead time and cost remarkably compared with existing manufacturing methods of cross-bar-shaped nanowire memory and simplifies its method of construction,” said Prof. Lee. “In particular, this technology will be used as a source technology to realize smart fabric, wearable computers, and textile electronic devices.”
 
This work was supported by the Center for Advanced Soft-Electronics as Global Frontier Project and the Pioneer Research Center Program through the National Research Foundation (NRF) of Korea funded by the Ministry of Science, ICT and Future Planning.